| from | 15-02-202316:00 |
| until | 15-02-202317:00 |
| duration | 1 hour |
| place | Fraunhofer IIS/EAS |
| city | Dresden, Germany |
| name | Ms. Marie NoackFraunhofer IIS/EAS |
| Marie.Noack@eas.iis.fraunhofer.de |
Designing analog/mixed-signal ICs is a major challenge for ASIC development with tight specifications and tapeout schedules that are not easy to meet. Therefore, we are continuously working on concepts and automated design tools that help designers with both design efficiency and risk management. In this webinar we will give you an insight into some of these solutions and how you can benefit from our solutions via licensing or as part of contract development of analog automation.